Hora: Des de 15:00h a 18:00h
Lloc: SMR
FPGA Lectures for scientists
FPGA Lectures for Scientist is a collection of hands-on FPGA programming lectures for scientists without (or very basic) experience in FPGA programming. The intent is to provide simple, functional and opensource examples, which incrementally incorporate new FPGA programming concepts. This course speeds up the initial learning curve and, after its completion, the attendees will be able to create their own FPGA designs that interface with digital & analog IOs.
Dates: 16th, 23rd, 30th of March and 6th of April from 15:00h – 18:00h
Target Group:
PhD students, Post-doctoral researchers and engineers with interest for high-speed digital electronics and who can benefit from custom signal generation and acquisition logic.
Available places: 10
Training content:
- VHDL/Verilog development
- Behavioral simulation
- Xilinx Zynq (FPGA chipset), Vivado (FPGA development environment), PYNQ (Python runtime configuration environment)
- Digital IOs
- Analog IOs (high-speed DAC / ADC)
- Advanced signal processing (DMA, DDS…)
Trainer: Dr. Pau Goméz
Pau Goméz is a Physicist and R&D developer at LuxQuanta.
“I discovered my passion for FPGAs during my PhD in (quantum) physics. The first months were quite challenging, where learning VHDL/Verilog, understanding the chipset architecture and using the huge Xilinx/Intel toolchain involved a steep initial learning curve and a significant amount of frustration. But once these hurdles were overcome (1-2 months later), I became capable of designing my own signal generation/acquisition systems and I replaced multiple of the old OP-27 circuits with an FPGA running a few lines of code.”
Hora: Des de 15:00h a 18:00h
Lloc: SMR
FPGA Lectures for scientists
FPGA Lectures for Scientist is a collection of hands-on FPGA programming lectures for scientists without (or very basic) experience in FPGA programming. The intent is to provide simple, functional and opensource examples, which incrementally incorporate new FPGA programming concepts. This course speeds up the initial learning curve and, after its completion, the attendees will be able to create their own FPGA designs that interface with digital & analog IOs.
Dates: 16th, 23rd, 30th of March and 6th of April from 15:00h – 18:00h
Target Group:
PhD students, Post-doctoral researchers and engineers with interest for high-speed digital electronics and who can benefit from custom signal generation and acquisition logic.
Available places: 10
Training content:
- VHDL/Verilog development
- Behavioral simulation
- Xilinx Zynq (FPGA chipset), Vivado (FPGA development environment), PYNQ (Python runtime configuration environment)
- Digital IOs
- Analog IOs (high-speed DAC / ADC)
- Advanced signal processing (DMA, DDS…)
Trainer: Dr. Pau Goméz
Pau Goméz is a Physicist and R&D developer at LuxQuanta.
“I discovered my passion for FPGAs during my PhD in (quantum) physics. The first months were quite challenging, where learning VHDL/Verilog, understanding the chipset architecture and using the huge Xilinx/Intel toolchain involved a steep initial learning curve and a significant amount of frustration. But once these hurdles were overcome (1-2 months later), I became capable of designing my own signal generation/acquisition systems and I replaced multiple of the old OP-27 circuits with an FPGA running a few lines of code.”